PWM stands for Pulse Width Modulation and it means changing the “on” duration (ton) of a pulse while keeping the period constant.
In the Above picture you can see different PWM Duty Cycles. if Ton less, the average of pulse is less. example if Ton become 10% and pulse voltage is 0 to 5V, the pwm average are less than 1V.
PWM has a lot of applications such as
- Generating an audio or sound signal
- Building constant voltage
- Digital potentiometer
- Motor control
- Light control
- Inverter feedback
Following code generates a PWM signal for changing light of an LED with VHDL.
library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity pwm_v1 is Port ( clk : in STD_LOGIC; pwm : out STD_LOGIC); end pwm_v1; architecture Behavioral of pwm_v1 is signal cnt:integer range 0 to 50000; signal cmp:integer range 0 to 50000; begin process(clk) begin if(rising_edge(clk))then cnt<=cnt+1; if(cnt=49999)then cnt<=0; pwm<='1'; cmp<=cmp+200; if(cmp>=49999)then cmp<=0; end if; elsif(cnt=cmp)then pwm<='0'; end if; end if; end process; end Behavioral;
In this code one input port is used for source clocking and one output port for generating PWM and connecting to an LED.
Suppose that we want the LED to stay on for 1 mili-second and then turn off. The clock frequency is 50MHz so when in every rising edge of clock, counter counts from 0 to 49999, a ton of 1ms is generated in the code.
Every time that counter reaches to max value, it becomes zero and cmp counts up (cmp+200 for faster change of ton)
when cnt reaches to cmp (cnt=cmp), output becomes zero and when cnt reaches to max value output becomes zero.
in the following picture, you can see how a PWM signal is generated.
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